FPGA Research

Digital Speedometer using FPGA


A speedometer is used to display the speed of motor vehicle in km/hr. A digital speedometer sense pulses from a sensor (which attached in vehicle wheel) and then it calculate the speed of the vehicle and display the speed in a “LCD” or “7 segment display”.


  1. Digital readout.
  2. Speed displays in km/h.
  3. Change of speed is linear (like analog speedometer).
  4. Speed range: 0km/h -200km/hr.
  5. Automatically senses a decrease in velocity even if there are no interrupts to the microprocessor. In other such devices, the device waits for another pulse to calculate the new velocity and if the pulse arrives very late or never at all, the same velocity is displayed.
  6. If the current timer count has exceeded the last timer count between two interrupts, it calculates what the velocity would be if the input pulse arrived just now. It helps to keep the velocity accurate at all times; even at extremely small velocities where other speedometers would be stuck at an incorrect value or would dumbly show 0 velocity after a timeout.


The calculation of the parameter is performed by counting the time between two consecutive revolutions of the wheel. The input pulses from the transducer in the wheel are fed into a FPGA as an interrupt signal.

To calculate the speed, we use the formula:


SPEED_MULTIPLIER = 36 at a counter clock of 2.5 MHz as the circumference =185.3 cm.
Speed = (6670/count) km/hr.



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